View TLE8444SL_4750222.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Data Sheet, Rev. 1.1, July 2009
TLE 8444SL
Quad Half-Bridge Driver IC
Automotive Power
TLE 8444SL
Table of Contents
Table of Contents
1 2 3 3.1 3.2 4 4.1 4.2 4.3 4.4 5 5.1 5.1.1 5.1.2 5.1.3 5.2 5.3 5.3.1 5.3.2 5.3.3 5.4 5.4.1 5.4.1.1 5.4.1.2 5.5 5.5.1 6 7 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input / Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Monitoring Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Supply Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power-Outputs 1-4 (Half Bridge Outputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection and Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit of Output to Ground or Vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Switching Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application Note for Bipolar Stepper Motor Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12 12 12 13 14 16 16 17 18 19 19 19 23 24 28
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Data Sheet
2
Rev. 1.1, 2009-07-07
Quad Half-Bridge Driver IC
TLE 8444SL
1
Features * * * * * * * * * * * * * * * *
Overview
4 Half-Bridge Power Outputs (1.3 RDS(ON)MAX @ Tj=150C) Minimum Overcurrent Shutdown at 0.9A Simple parallel interface control of Half-Bridge Outputs Inverted and Non-inverted Inputs to minimize number of microcontroller connections Very low current consumption in sleep mode (max. 5A) Error Flag Diagnosis Open Load Diagnosis in ON-state for all outputs Outputs protected against overcurrent Over temperature protection with hysteresis Over and Under voltage lockout 3.3V / 5V compatible inputs with hysteresis No crossover current Internal freewheeling diodes Thermally enhanced package (fused leads) Green Product (RoHS compliant) AEC Qualified
PG-SSOP-24-7
Description The TLE 8444SL is a protected Quad-Half-Bridge-IC targeted towards automotive and industrial motion control applications. It is a monolithic die based on Infineon's smart mixed technology SPT which combines bipolar and CMOS control circuitry with DMOS power devices. DC-Motors can be driven in forward (cw), reverse (ccw), brake and high impedance modes where as StepperMotors can be driven in No-Current, negative / positive output current modes. These various modes can easily be achieved via standard parallel interface of the device to a microcontroller. The PG-SSOP-24-7 package is advantageous as it saves PCB-board space and costs. The integrated short circuit and over-temperature protection as well as it's built-in diagnosis features such as over- and under voltage-lockout and open load detection improves system reliability and performance.
Target Applications: * * * Unipolar or Bipolar Loads Stepper Motors (e.g. Idle Speed Control) DC brush Motors Package PG-SSOP-24-7 3 Marking TLE8444SL Rev. 1.1, 2009-07-07
Type TLE 8444SL Data Sheet
TLE 8444SL
Block Diagram
2
Block Diagram
VS
TLE8444
IN1
Internal Supply Function Logic OUT1+2
Vs monitor
under/overvoltage detection
IN2
Protected Driver Stage OUT1+2
OUT1 OUT2
INH EF1 EF2
Inhibit Charge Pump Error Flag Generation OUT3
IN3 IN4
Function Logic OUT3+4
Protected Driver Stage OUT3+4
OUT4
GND
Figure 1 Block Diagram
Data Sheet
4
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Diagram
VS
IS
VS INH
VDSHSx
VFU
VINH, VINHH, VINHL
IINHH
TLE8444
EFx OUTx
VEFx, VEFLx
IEFLKx
IOUTx
IINx
INx
VDSLSx
GND
VFL
VINx, VINHx, VINLx
IGND
Figure 2
Terms
Data Sheet
5
Rev. 1.1, 2009-07-07
TLE 8444SL
Pin Configuration
3
3.1
Pin Configuration
Pin Assignment
GND GND OUT 1 VS EF1 IN1 IN2 EF2 VS OUT 2 GND GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
n.c. OUT3 VS n.c. GND IN3 IN4 INH n.c. VS OUT 4 n.c.
Figure 3
Pin Configuration
3.2
Pin
Pin Definitions and Functions
Symbol Function Ground; Signal ground; All GND pins must be externally connected together to the common GND potential Power Output of Half-bridge 1 Short circuit protected; with integrated free-wheeling diodes Power Supply Voltage; All VS pins must be externally connected together to the Battery Voltage with Reverse protection Diode, buffer capacitance and Filter against EMC. See Application Diagram, Figure 18 and Figure 19 for more information Error Flag 1 (Diagnosis Output) Open drain by default; Low = error Input Channel of Half-bridge 1 Controls OUT1, Non-inverting Intput with internal Pull Down Input Channel of Half-bridge 2 Controls OUT2, Inverting Input with internal Pull Up Error Flag 2 (Diagnosis Output) Open drain by default; Low = error Power Output of Half-bridge 2 Short circuit protected; with integrated free-wheeling diodes Not Connected
1, 2, 11, GND 12, 20 3 OUT1
4, 9, 15, VS 22 5 6 7 8 10 13, 16, 21, 24 EF1 IN1 IN2 EF2 OUT2 N.C.
Data Sheet
6
Rev. 1.1, 2009-07-07
TLE 8444SL
Pin Configuration Pin 14 17 18 19 23 Symbol OUT4 INH IN4 IN3 OUT3 Function Power Output of Half-bridge 4 Short circuit protected; with integrated free-wheeling diodes Inhibit Input Low = Device in sleep mode Input Channel of Half-bridge 4 Controls OUT4, Inverting Input with internal Pull Up Input Channel of Half-bridge 3 Controls OUT3, Non-inverting Intput with internal Pull Down Power Output of Half-bridge 3 Short-circuit protected; with integrated free-wheeling diodes
Data Sheet
7
Rev. 1.1, 2009-07-07
TLE 8444SL
General Product Characteristics
4
4.1
General Product Characteristics
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
Tj = -40 C to +150 C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Pos. Voltages 4.1.1 4.1.2 4.1.3 Currents 4.1.4 4.1.5 4.1.6 4.1.7 4.1.8 4.1.9 Output current (diode) Output current (EF1; EF2) Junction temperature Storage temperature Supply voltage Logic input voltages (IN1; IN2; IN3; IN4; INH) Logic output voltage (EF1; EF2) Parameter Symbol Limit Values Min. Max. 40 5.5 5.5 V V V - 0 V < VS < 40 V 0 V < VS < 40 V Unit Conditions
VS VIN(1-4) VINH VEF(1+2)
-0.3 -0.3 -0.3
IOUT(1-4) IEF(1-2) Tj Tstg
-1 -2 -40 -50 -2 -2
1 5 150 150 2 2
A mA C C kV kV
- - - -
2)
Temperatures
ESD Susceptibility ESD capability of OUT and VS pin vers. VESD GND ESD capability of logic pins vers. GND VESD
2)
1) Not subject to production test, specified by design. 2) Human Body Model according to ANSI EOS\ESD S5.1 standard (eqv. to MIL STD 883D and JEDEC JESD22-A114)
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation.
Data Sheet
8
Rev. 1.1, 2009-07-07
TLE 8444SL
General Product Characteristics
4.2
Pos. 4.2.1 4.2.2
Functional Range
Parameter Supply Voltage Range for Normal Operation Symbol Min. Limit Values Max. 18 V V - Limit values, deviations possible; After VS rising above 8 Unit Conditions
VS(nor)
Extended Supply Voltage Range VS(ext) for Operation
VUV OFF
VOV OFF
VUV ON
4.2.3 4.2.4 4.2.5 4.2.6
Supply voltage increasing Supply voltage decreasing Logic input voltages (IN1; IN2; IN3; IN4; INH) Junction temperature
VS VS VIN(1-4) VINH Tj
-0.3 -0.3 -0.3 -40
VUV ON VUV OFF
5.5 150
V V V C
Outputs are open Outputs are open - -
Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Pos. 4.3.1 4.3.2 Parameter
Junction to Soldering Point Junction to Ambient1)
1)
Symbol Min.
Limit Values Typ. - 60 Max. 26 - - -
Unit K/W K/W
Conditions
pin 1, 2, 11, 122)
3)
RthJSP RthJA
1) Not subject to production test, specified by design 2) Specified RthJS value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature). Ta=25C, LS1+HS2+LS3+HS4 are dissipating 1W (0.25W each). 3) Specified RthJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70m Cu, 2 x 35m Cu). Ta=25C, LS1+HS2+LS3+HS4 are dissipating 1W (0.25W each).
Data Sheet
9
Rev. 1.1, 2009-07-07
TLE 8444SL
General Product Characteristics
4.4
4.4.3
Electrical Characteristics
Electrical Characteristics
VS= 8 V to 18 V, Tj = -40 C to +150 C, INH = HIGH; IOUT1-4 = 0 A; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Pos. Parameter Symbol Min. Current Consumption, INH = GND 4.4.1 Quiescent current Limit Values Typ. 1 Max. 5 A Unit Conditions
IS
-
VS = 13.5 V; Tj < 85C
IN1+3=L, IN2+4=H
Current Consumption, INH = HIGH 4.4.2 4.4.3 4.4.4 4.4.5 4.4.6 4.4.7 4.4.8 4.4.9 Supply current UV Switch ON voltage UV Switch OFF voltage UV ON/OFF hysteresis OV Switch OFF voltage OV Switch ON voltage OV ON/OFF hysteresis High- and low-side switch
IS VUV ON VUV OFF VUV HY VOV OFF VOV ON VOV HY RDSON
- 4.2 4 0.05 21 20 - - -
5 - - 0.26 - - 1 0.6 1.0 2.4 1.2 25 12 350 10 6 2 1 5 1 2 1 2
10 5 4.8 0.7 25 24 - 0.8 1.3 3.2 1.6 50 20 600 14 9 4 2 8 3 5 2 -
mA V V V V V V A A s mA s s s s s s s s s s
Over- and Under Voltage Lockout
VS increasing, see Figure 6 VS decreasing, see Figure 6 VUV ON - VUV OFF, see Figure 7 VS increasing, see Figure 6 VS decreasing, see Figure 6 VOV OFF - VOV ON, see Figure 7
IOUT = 0.8 A; Tj = 25 C IOUT = 0.8 A; Tj = 150 C HS+LS each Channel, see Figure 13
Static Drain-source ON-Resistance
Output Protection and Diagnosis 4.4.10 4.4.11 4.4.12 4.4.13 4.4.14 4.4.15 4.4.16 4.4.17 4.4.18 4.4.19 4.4.20 4.4.21 4.4.22 4.4.23 Short Circuit Current1) Overcurrent Shutdown Threshold Shutdown Delay Time Open Load Detection Current Open Load Delay Time high-side ON delay-time high-side switch ON time high-side OFFdelay-time high-side switch OFF time low-side ON delay-time low-side switch ON time low-side OFF delay-time low-side switch OFF time dead-time
ISC(1-4) ISD(1-4) tdSD(1-4) IOLD(1-4)
1.8 0.9 10 6
each LS Channel, see
Figure 15
tdOLD(1-4) 200 tdONH tONH tdOFFH tOFFH tdONL tONL tdOFFL tOFFL tDB
7 2 1 0.2 2 0.5 1 0.5 0.1
Output Switching Times VS=13.5V, resistive Load =100, see Figure 16 and Figure 17
tdONH - tONH - tdOFFL or tdONL - tONL - tdOFFH
Outputs OUT(1-4), Freewheeling Diodes 4.4.24 Forward voltage; upper
VFU
- 10
1
1.5
V
IF = 0.4 A, INH = LOW
Rev. 1.1, 2009-07-07
Data Sheet
TLE 8444SL
General Product Characteristics Electrical Characteristics (cont'd)
VS= 8 V to 18 V, Tj = -40 C to +150 C, INH = HIGH; IOUT1-4 = 0 A; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Pos. 4.4.25 4.4.26 4.4.27 4.4.28 4.4.29 4.4.30 4.4.31 4.4.32 4.4.33 4.4.34 4.4.35 4.4.36 4.4.37 4.4.38 4.4.39 Parameter Forward voltage; lower Symbol Min. Limit Values Typ. 0.9 - - - - 0.3 25 25 - - 0.25 25 - - - Max. 1.4 - 0.8 - 0.8 - 50 50 - 0.8 - 50 100 100 40 V V V V V V A A V V V A s s s - Unit Conditions
VFL
IF = 0.4 A, INH = LOW
- - - - -
Input Interface, Logic Inputs IN1, IN2, IN3, IN4 High-input voltage IN1, IN3 VINH(1+3) 2
VINL(1+3) High-input voltage IN2, IN4 VINH(2+4) Lowh-input voltage IN2, IN4 VINL(2+4) Hysteresis of input voltage VINHY Pull down current IIN(1+3) Pull up current IIN(2+4)
Low-input voltage IN1, IN3 High-input voltage Low-input voltage Hysteresis of input voltage Pull down current Disable Delay Time Enable Delay Time Time delay to Sleep Mode
- 2 - 0.1 10 10 2 - - 10 - - -
VIN(1+3) = 2 V VIN(2+4) = 0.8V
- - -
Input Interface, Logic Inputs INH
VINHH VINHL VINHHY IINH tddis tden tSLEEP
VINH = 2 V
VS=13.5V, resistive Load=100, see Figure 4 INH = LOW until Sleep mode is reached
Input Interface, Error-Flags EF(1+2) 4.4.40 4.4.41 4.4.42 4.4.43 4.4.44 Low-output voltage level Leakage current Error delay time
VEFL(1+2) - IEFLK(1+2) - tdEF -
150 125
0.2 - 5 175 -
0.4 10 10 200 175
V A s C C
IEF(1+2) = 2 mA 0 V < VEF(1+2) < 5.5 V
- - -
Thermal Shutdown Thermal shutdown junction TjSD temperature 1) Thermal switch-on junction temperature 1)
TjSO
1) Not subject to production test, specified by design
Data Sheet
11
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
5
5.1 5.1.1
Block Description
Power Supply General
The TLE 8444SL has one power supply input VS which is connected to the automotive 12V board-net. All power drivers are connected to this supply voltage VS. The logic supply voltage for the integrated driver stages and logic block is generated by an internal bandgap reference circuit derived from the 12V board-net. To block the supply voltage of the device, a 47F electrolytic capacitance is recommended. For EMC improvements a 100nF ceramic capacitance can be added and should be placed as close as possible to the VS-Pin of the device. See Application Diagrams, Figure 18 and Figure 19 for more information.
5.1.2
Sleep Mode
The TLE 8444SL can be placed in low current-consumption mode (or sleep mode) by setting the input, INH pin to LOW. The INH pin has an internal pull-down current source. In sleep-mode, all output transistors are switched off. An output disable and enable time is specified and this behavior is shown in Figure 4 below.
V High INH Low A ON IOUTx OFF
Figure 4
50%
50%
t
90%
10% tddis tden
t
Enable and Disable Delay Time
Data Sheet
12
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
5.1.3
Reverse Polarity
The TLE 8444SL requires an external reverse polarity protection. This protection is essential to avoid an undesired reverse current (IRB) to flow from ground potential to battery causing excessive power dissipation across the diodes in the event of reverse polarity. Hence a reverse polarity protection diode is recommended (Figure 5).
a)
GND
b)
VS
DRP CS2 CS DZS
HSx OUTx LSx
TLE8444
HSx OUTx LSx
TLE8444
IRB VS
Figure 5 Reverse Polarity Protection
GND
Data Sheet
13
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
5.2
Input / Output Stages
Input Circuit The control inputs consist of TTL/CMOS-compatible schmitt-triggers with hysteresis. Inputs IN1 and IN3 have internal pull down circuits whereas IN2 and IN4 have internal pull up circuits. If no signal is applied to the inputs and INH=HIGH, then the drivers will by default be placed in Brake LL mode. In sleep mode, the outputs are switched OFF (tristate or HIgh-Z). For optimized bipolar stepper motor control applications, the IN2 and IN4 inputs have internal inverting structures. This concept allows IN1+IN2 and IN3+IN4 to be tied together, which ultimately reduces C output pins and provides a `2-phase' type of control to the device (refer to Figure 19 and Figure 21). Output stages The output stages consist of a total of 4 DMOS Half-bridges. Integrated circuits protect the outputs against overcurrent and overtemperature. Positive and negative voltage spikes, which occur during switching of inductive loads, are supressed through integrated free-wheeling diodes. The Truth Table below shows the output behavior of OUT1 and OUT2 for DC-motor applications. The same table is also applied to OUT 3 and OUT4. Table 1 INH 0 1 1 1 1 1 Functional Truth Table of Half-bridge 1 and 2 for DC-Motor Application IN1 X open 0 0 1 1 IN2 X open 0 1 0 1 OUT1 |Z| L L L H H OUT2 |Z| L H L H L Mode Sleep Mode (Low current consumption mode) Brake LL (both low side transistors turned-ON) DC-Motor turns counterclockwise (CCW) Brake LL (both low side transistors turned-ON) Brake HH (both high side transistors turned-ON) DC-Motor turns clockwise (CW)
Note: Half-Bridges 1 and 2 form a full bridge The Truth Table below shows the output behavior of OUT1 and OUT2 for bipolar Stepper-motor applications. The same table is also applied to OUT 3 and OUT4. Table 2 INH 0 1 1 1 1 1 Functional Truth Table of Half-bridge 1 and 2 for Bipolar Stepper Motor Application IN1 X open 0 0 1 1 IN2 X open 0 1 0 1 OUT1 |Z| L L L H H OUT2 |Z| L H L H L Mode Sleep Mode (Low current consumption mode) no current (both low side transistors turned-ON) negative phase current no current (both low side transistors turned-ON) no current (both high side transistors turned-ON) positive phase current
Note: Half-Bridges 1 and 2 form a full bridge
Data Sheet
14
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
IN1, IN3 0 = Logic LOW 1 = Logic HIGH IN2, IN4 0 = Logic LOW 1 = Logic HIGH X = don't care
OUT1, OUT3 Low side transistor is turned-ON High side transistor is turned-OFF High side transistor is turned-ON Low side transistor is turned-OFF OUT2, OUT4 High side transistor is turned-ON Low side transistor is turned-OFF Low side transistor is turned-ON High side transistor is turned-OFF X = don't care |Z| = High- and Lowside transistor are turned-OFF (Output in Tristate, High Z)
Data Sheet
15
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
5.3 5.3.1
Monitoring Functions Diagnostics
The EF1 and EF2 pins are open drain outputs and must be externally connected via pull-up resistors to 5V. In normal conditions, the EF1 and EF2 signals are by default high. In case of an error, EF1 and EF2 pins are pulled low. There are 3 different error conditions that could flag a fault condition:
5.3.1.1
Overcurrent
Output shorted to Ground: If an output transistor is turned on and the current rises above the shutdown threshold ISD for longer than the shutdown delay time td_SD, the output transistor is turned off and the corresponding diagnosis bit is set. Within this delay time, the current is limited to ISC as shown in Figure 9. Changing the INHIBIT input resets the error flag. Also a power down event will reset the Error Flag. a) Output short to VS: same behavior as short to GND. b) Short across the load: same behavior as short to GND.
5.3.1.2
Open load
If the current through the low side transistor is lower than the reference current IOLD in ON-state for longer than the open-load detection delay time td_OLD, the open-load error flag is set. The output will remain ON. Once the output current increases and Iload > IOLD, the Error Flag will be reset automatically after the td_OLD filter time (Figure 15).
5.3.1.3
Over voltage / over temperature
a) Over voltage: For voltages below the undervoltage switch OFF threshold (VUVOFF) and above the overvoltage switch OFF threshold (VOVOFF), the output stages will be switched OFF. The Error Flag however only signals the overvoltage switch OFF case (Figure 6). A switching hysteresis is implemented at both thresholds to allow an autorecovery mode if the supply voltage is back within the operational range. b) Over Temperature: At a junction temperature higher than the thermal shutdown temperature TjSD (typ. 175C) the device enters thermal shutdown which turns-Off all four output stages simultaneously and the corresponding Error Flags are set with a delay. After cooling down to the thermal switch-on junction temp TjSO the device will auto restart. A thermal toggle behavior can be observed (the Error Flags and output stages will be modulated by the thermal time constants; Figure 8). The Table below shows the behavior of the Error Flags: Table 3 EF1 1 1 0 0 1 0 1 0 Diagnosis EF2 Interpretation of Error no error overcurrent open load over voltage / over temperature Error Flag behavior Output status latch auto recovery auto recovery normal operation latched switch OFF normal operation auto recovery Priority 2 3 1
Data Sheet
16
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
5.3.2
Power Supply Monitoring
The power supply Voltage VS is monitored for over- and under voltage (refer to block diagram: Figure 1). Figure 6 shows the error flag signalling during an undervoltage and overvoltage situation where as Figure 7 shows the hysteresis concept implemented during undervoltage and overvoltage. Under Voltage If the supply voltage VS drops below the switch off voltage VUVOFF, all output transistors are switched off but the the Error Flags remain high (no error). If VS rises again and reaches the switch on voltage VUVON, the power stages are restarted. Over Voltage If the supply voltage VS rises above the switch off voltage VOVOFF, all output transistors are switched off and the Error Flags are set. The error is not latched, i.e. if VS falls again and reaches the switch on voltage VOVON, the power stages are restarted and the Error Flags are reset.
VS
VOVOFF VUVHY VUVOFF VUVON
VOVHY VOVON
t VOUTx
ON High Z Error Status undervoltage without error signalling overvoltage with error signalling t d_EF td_EF
t
EF1
H L
t
td_EF td_EF
EF2
H L
t
Figure 6
Error Flag behavior for the Over- and Undervoltge case
Data Sheet
17
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
VOUT
H VUVHY VUVHY
L
VS
VUVOFF
(min)
VUVON VUVOFF
(min) (max)
VUVON
(max)
Figure 7
Undervoltage Hysteresis
5.3.3
Temperature Monitoring
Temperature sensors are integrated in the power stages. Each half bridge (HS+LS) is equipped with one temperature sensor. The temperature monitoring circuit compares the measured temperature to the shutdown thresholds. If one or more temperature sensors reach the shutdown temperature TjSD, the overtemperature Error Flag is set to LOW. This Error Flag is not latched (i.e. if the temperature falls below the switch on threshold TjSO, the Error Flag is automatically reset to HIGH again). This is shown in Figure 8 below.
Tj
T jSD
T jSO
t VOUTx
ON High Z Error Status no error td_EF overtemperature error td_EF
t
EF1
H L
t
t d_EF td_EF
EF2
H L
t
Figure 8 Data Sheet
Overtemperature signalling 18 Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
5.4 5.4.1
Power-Outputs 1-4 (Half Bridge Outputs) Protection and Diagnosis
The device provides embedded protective functions. Integrated protection functions are designed to prevent IC destruction under fault conditions described in this target datasheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation.
5.4.1.1
Short Circuit of Output to Ground or Vs
The low-side switches are protected against short circuit to supply and the high-side switches against short to GND. If a switch is turned on and the current rises above the shutdown threshold ISD for longer than the shutdown delay time tdSD, the output transistor is turned off and the corresponding Error Flag is set. Within the delay time, the current is limited to ISC as shown in Figure 9.
ISC OUTx short to Vs IOUT ISD tdSD
short to GND
t
Figure 9 Short circuit protection
The delay time is optimized to limit the power that is dissipated in the device during a short circuit event. This scheme allows high peak-currents as required in motor-applications during normal operations. The output stage stays off and the corresponding diagnostics output information is set until INHIBIT toggles to low and high again or a power-on reset is performed. (refer to Figure 13)
Data Sheet
19
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
Internal Supply OUT
Delay
Control Input EF2
MOC
LS-Dirver
MOL
Lowside Power Transistor
td
GND
Current Limit
Rsense
overcurrent
openload
Rsense
Gate Status
GND Delay
+ -
VOC
EF1 Error Flag Generation
td Delay
td GND
+ -
VOL
Power GND
Figure 10
Simplified Schematic for Short circuit protection and Open Load detection in LS-switch
VCHP
VS Rsense
HS-Driver 1
overcurrent
Control Input
MOC
HS-Dirver 2
Highside Power Transistor
Current Limit
OUT EF2 Gate Status
Delay
+ Error Flag Generation
VOC
td
GND
Figure 11
Simplified Schematic for short circuit protection in HS-switch
Data Sheet
20
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
V REF
V REF
RF-Blanking H = OT tRR
Shut down all output stages
Temp Sensor GND GND
+VS
RF-Blanking Shut down all output stages H = OV tRR RF-Blanking
VREF
GND OR 1 OC_HS1 OC_HS2 OC_HS3 OC_HS4 Delay
>1
OR2
OC_HSD td OR3
OC_LS1 OC_LS2 OC_LS3 OC_LS4
Delay OC_LSD td
>1
OR4
OL1 OL2 OL3 OL4
Delay
>1
td GND
Figure 12
Simplified Schematic of the TLE8444 Error Flag Generation Concept
Data Sheet
+ -
+
-
+ UV
Thermal Shut Down
EF2
OR6
>1
Shut down all output stages ERROR-FF POR
Level-Shift
H = UV tRR
GND
Vsupply-Supervision
R
& &
Q
>1
OCD
S
Q
Overcurrent-Interface
OR5 OLD
EF1
>1
Level-Shift
Openload-Interface
Error-Interface
21
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description Short Circuit Diagnosis If a short circuit of a halfbridge output to GND is present, the device will behave like displayed in Figure 13 below.
INH active mode INx tSLEEP active mode t
sleep mode
IOUTx ISC ISD
t
td_SD
td_en
td_SD t
EF2
t EF1
t
Figure 13 Overcurrent signalling
Data Sheet
22
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
5.4.1.2
Open Load
Open-load detection in ON-state is implemented in the low-side transistors of the bridge outputs. If the current through the low side transistor is lower than the reference current IOLD in ON-state for longer than the open-load detection delay time td_OLD, the open-load error flag is set. The output transistor, however, remains ON. The open load Error Flag has an autorecovery behavior. Example of open load detection is shown below in Figure 14, Figure 15.
HS1 LS1
OUT 1 Open Load
M HS2 LS2 OUT 2
Figure 14
Open Load example
IN1 t IN2 IOUT12
IOLD td_OLD td_OLD td_OLD
t
t
EF1
t EF2 VOUT1 t
VOUT2
t
t
Figure 15 Open Load signalling
Data Sheet
23
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
5.5
Output Switching Capability
Dead Time to prevent Cross Currents In bridge configurations the high-side and low-side power transistors are ensured never to be simultaneously "ON" to avoid cross currents. This is usually assured by the integration of delays in the driver stage for the power outputs, generating a so-called dead-time between switching off one Power Transistors while switching on the other Power Transistor of the same half-bridge. To ensure that there is no overlap of the switching slopes that would lead to a cross current, a dead-time tdb is specified. Refer to Figure 16 and the test circuit in Figure 17.
V INx
H
50% 50%
L
t
tdonH tonH
90% 90%
IOUTx
+ Vs 100
tdoffH toffH
tdb no current
10% 10% 10%
tdb
10%
t
-
Vs 100 tdoffL
90%
90%
t offL tdonL
tonL
Figure 16
Switching Time Definitions
Data Sheet
24
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
VS
INH=High INx
HSx
IOUTx
100
A LSx
TLE8444
OUTx
100
GND
Figure 17 Switching Time Characterization Circuit
Data Sheet
25
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
100 nF Watchdog In Watchdog Out Reset Out Q
CD
D 8 1 14 9 6 GND 3-5,10-12 7 Reset Adjust 13
RWA
100k
VBAT DRP
VReg TLE4678 G
Watchdog Adjust Input
2
CI
CQ REF2
WDO WDI R VCC
100nF
22F
REF1 VS EF1 EF2 INH OUT2
( pin 4,9,15,22)
CS2
100 nF
CS
47F
DZS
OUT1
M1
M1
C XC866
IN1 IN2 IN3 IN4
TLE8444
M2
OUT3
M1
M2
OUT4 GND
( pin 1,2,11,12, 20)
M3
Two Motor separately
Three Motor cascaded
Single motor, higher current
a
Figure 18 Application Circuit for DC brush motor loads
b
c
Figure 18a, Two Motor separately: e.g. mirror x-y position. The motors can be driven independently or in parallel. Figure 18b, Three Motor cascaded: e.g. HVAC flap control. The DC brush motors are never ON at the same time. The switching of the cascaded motors should happen one after another. Due to this setup, 3 flaps can be driven, by saving one halfbridge. Figure 18c, Single Motor higher current: Applications with DC brush motors which require higher stall and inrush currents. The application PCB layout of input and output traces must be as symmetrical as possible to assure a proper behavior of the device. Note : All VS and GND pins must be externally connected together. CS and CS2 capacitors must be placed as close as possible to the Vs pin for optimized EMC performance.
Data Sheet
26
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
100 nF Watchdog In Watchdog Out Reset Out Q D 8 1 14 9 6 GND 3-5,10-12 7 Reset Adjust 13
CD
RWA
100k
VBAT DRP
VReg TLE4678 G
Watchdog Adjust Input
2
CI
CQ REF2
WDO WDI R VCC
100nF
22F
REF1 VS EF1 EF2
( pin 4,9,15,22)
CS2
100 nF
CS
47F
DZS
OUT1
INH OUT2
C XC866
IN1 IN2 IN3 IN4
TLE8444
OUT3
M
OUT4 GND
( pin 1,2,11,12, 20)
Bipolar Stepper Motor
Figure 19
Application Circuit for bipolar stepper motor loads
Note : All VS and GND pins must be externally connected together. CS and CS2 capacitors must be placed as close as possible to the Vs pin for optimized EMC performance.
Data Sheet
27
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description
5.5.1
Application Note for Bipolar Stepper Motor Control
Current Flow In a H-Bridge for stepper motor control To achieve a continuous movement of a bipolar stepper motor rotor, the phase current has to be reversed step by step. The current flow through a fullbridge is displayed in Figure 20 below. Picture a) on the left hand side shows a current flow over HS1 the phase coil of the stepper motor load, the LS2 to GND. The next step reverses the current flow through the phase coil of the motor by switching off HS1 and LS2 and activating HS2 and LS1 instead (Picture b).
Vs
Vs
HS1
HS2
HS1
HS2
Lphase OUT1 R phase OUT2 OUT1 R phase
Lphase OUT2
LS1
LS2
LS1
LS2
a
GND
b
GND
Figure 20
Reversing the current in fullbridge operation to achieve a stepper motor movement
Data Sheet
28
Rev. 1.1, 2009-07-07
TLE 8444SL
Block Description Control pattern for bipolar stepper motor applications Bipolar stepper motors applications for linear positioning such as Idle Speed control requires a specific input signal pattern which is displayed in Figure 21. Normally, the output switching frequency is lower (approx. < 2kHz). This depends on the used motorload (L/R ratio).
VIN1= VIN2
High
Low
t
IOUT12
+Iload 0
t
-Iload
VIN3= VIN4
High
Low
t
90 Phaseshift
IOUT34
+Iload 0
t
-Iload
Figure 21
Bipolar stepper motor control (full step mode)
Data Sheet
29
Rev. 1.1, 2009-07-07
TLE 8444SL
Package Outlines
6
Package Outlines
0.35 x 45 3.9 0.11)
1.75 MAX. 0.2 -0.1
C
0.19 +0.06
8 MAX.
0.2 -0.1
(1.47)
8 MAX. 0...8
0.65 0.25 0.05 2)
0...8
B
0.1 B Seating Plane
0.64 0.25
6 0.2 0.2
8 MAX.
M
0.17 M C A B 24x
C
24
13
1
12
8.65 0.11) Index Marking
A
1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion of 0.13 max. 3) JEDEC registration MO-137 variation AE
Figure 22 PG-SSOP-24-7 (Plastic/Plastic Green - Dual Small Outline Package)
GPS01214
Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. Data Sheet 30
Dimensions in mm Rev. 1.1, 2009-07-07
TLE 8444SL
Revision History
7
0.40.3
Revision History
TLE 8444SL Revision History: Rev. 1.1, 2009-07-07 Version 1.1 1.0 Subjects (major changes since last revision) Package Illustration on overview sheet corrected from exposed pad to standard SSOP package Final Data Sheet Release
Data Sheet
31
Rev. 1.1, 2009-07-07
Edition 2009-07-07 Published by Infineon Technologies AG 81726 Munich, Germany (c) 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

▲Up To Search▲

Price & Availability of TLE8444SL

	To Download TLE8444SL Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .